Apparatuses For Treating Pluralities of Discrete Semiconductor Substrates

ABSTRACT

The invention includes a method for treating a plurality of discrete semiconductor substrates. The discrete semiconductor substrates are placed within a reactor chamber. While the substrates are within the chamber, they are simultaneously exposed to one or more of H, F and Cl to remove native oxide. After removing the native oxide, the substrates are simultaneously exposed to a first reactive material to form a first mass across at least some exposed surfaces of the substrates. The first reactive material is removed from the reaction chamber, and subsequently the substrates are exposed to a second reactive material to convert the first mass to a second mass. The invention also includes apparatuses which can be utilized for simultaneous ALD treatment of a plurality of discrete semiconductor substrates.

TECHNICAL FIELD

[0001] The invention pertains to methods for treating pluralities ofdiscrete semiconductor substrates to form layers of material over thesubstrates. In particular applications, the invention pertains to atomiclayer deposition of materials over semiconductor substrates. Theinvention also pertains to apparatuses which can be utilized duringtreatment of a plurality of discrete semiconductor substrates.

BACKGROUND OF THE INVENTION

[0002] It is frequently desired to form high quality layers of materialover semiconductor substrates during semiconductor device fabrication.Among the materials which can be included in such layers are tantalumpentoxide, titanium nitride, titanium silicon nitride, tantalum nitride,tantalum silicon nitride, titanium silicide, tantalum silicide, tungstennitride, aluminum oxide, hafnium oxide, zirconium oxide, siliconnitride, silicon dioxide, elemental tungsten and elemental titanium.Numerous methods have been developed for forming layers of suchmaterials, with exemplary methods including chemical vapor deposition(CVD), and in some cases atomic layer deposition (ALD).

[0003] Chemical vapor deposition comprises mixing two or more reactantsin a chamber to form a material which subsequently deposits acrossexposed surfaces of one or more semiconductor substrates. An advantageof chemical vapor deposition is that it can be utilized in batchprocesses, or, in other words, can be utilized to simultaneously treat aplurality of discrete semiconductor substrates. Among the disadvantagesof chemical vapor deposition is that it can be difficult to controlreactions between the reactants provided in a chamber, and accordinglyvarious side-reactions can occur to generate contaminants. Additionally,it can be difficult to form a uniform layer over multiple exposedsurfaces of one or more semiconductor substrates with CVD. Thedeposition of CVD material can be faster in various regions ofsemiconductor typography than other regions, leading to non-uniformityin a thickness of the deposited material across various exposed surfacesof semiconductor substrates provided within a CVD reaction chamber.

[0004] ALD can overcome some of the problems discussed above relative toCVD. ALD processing typically comprises forming thin films of materialby repeatedly depositing monoatomic layers. The technique involvesindividually depositing precursors, or reactants, that react in situ toform a desired film of material across a semiconductor substrate. Morespecifically, ALD processes involve introduction of a first reactantwhich reacts with a substrate to form a monolayer across the substrate.The first reactant will typically react with the substrate, but not withitself. Accordingly, side-reactions are eliminated. Further, thereaction of the reactant with the substrate is self-limiting, in thatonce a monolayer forms across exposed surfaces of the substrate there isno longer further reaction of the reactant with the substrate.

[0005] After the monolayer is formed, the first reactant is flushed fromthe processing chamber, and a second reactant is subsequentlyintroduced. The second reactant reacts with the monolayer of materialformed from the first to convert such monolayer into a desired mass overthe substrate. The desired mass can be uniformly thick across thevarious surfaces of the substrate. The mass can be made thicker byrepeating the above-described process. Specifically, the mass can becomean upper surface of a semiconductor substrate, and can be utilized forreaction with the first reactant. Subsequently, the second reactant canbe introduced to form a second layer of the mass over the first layer.The process can be repeated until a desired thickness of the mass isformed.

[0006] A problem with existing ALD technologies is that such are nottypically suitable for utilization in batch processes. Rather,semiconductor substrates are treated one at a time, and throughput ofsubstrates through ALD processes is thus low relative to CVD processes.Some effort has recently been made to develop batch processes for ALD ofsilicon nitride. Specifically, a batch of wafers is exposed totrichlorosilane in a reaction chamber to form a silicon-containingmonolayer over exposed surfaces of the substrates. Subsequently, thetrichlorosilane is evacuated from the chamber and ammonia is introducedto convert the silicon-containing material to silicon nitride. Thetrichlorosilane deposition occurs at a temperature at least 150° C.different than the ammonia treatment.

[0007] It would desirable to extend batch ALD processes to othermaterials besides silicon nitride. It would also be desirable to developimproved processes for batch ALD of silicon nitride.

SUMMARY OF THE INVENTION

[0008] In one aspect, the invention encompasses a method-for treating aplurality of discrete semiconductor substrates. The discretesemiconductor substrates are placed within a reactor chamber. While thesubstrates are within the chamber, they are simultaneously exposed toone or more of H, F and Cl to remove native oxide (such can beconsidered an in situ cleaning of the substrates). After removing thenative oxide, the substrates are simultaneously exposed to a firstreactive material to form a first mass across at least some exposedsurfaces of the substrates. The first reactive material is removed fromthe reaction chamber, and subsequently the substrates are exposed to asecond reactive material to convert the first mass to a second mass.

[0009] In one aspect, the invention encompasses a method in which aplurality of discrete semiconductor substrates are placed within areaction chamber and simultaneously exposed to a first reactive materialto form a first mass across at least some exposed surfaces of thesubstrates. The first reactive material is removed from the reactionchamber, and subsequently the substrates are exposed to a secondreactive material to convert the first mass to a second mass. The secondmass comprises one or more of tantalum, titanium, tungsten, aluminum,hafnium, SiO and Zr, with the listed composition of SiO being shown interms of the elements contained therein rather than in terms of astoichiometric relationship With the elements.

[0010] In one aspect, the invention encompasses a method in which aplurality of discrete semiconductor substrates are treated within areaction chamber. The substrates are first exposed to a first reactivematerial to form a first mass across at least some exposed surfaces ofthe substrates, with the substrates being held at a first temperatureduring the exposure to the first reactive material. The first reactivematerial is then removed from the reaction chamber. Next, the substratesare exposed to a second reactive material to convert the first mass to asecond mass, with the substrates being at a temperature within about100° C. of the first temperature during the exposing to the secondreactive material. It is noted that in particular aspects of theinvention, the temperature of the substrates during exposure to thefirst reactive material can vary by more than 100° C. relative to thetemperature of the substrates during exposure to the second reactivematerial.

[0011] Various aspects of the invention can utilize a fast ramp furnaceto control the temperature of substrates exposed to reactive materials,and the purging of reactive materials from a reaction chamber can occurduring ramp-up and/or ramp-down of the temperature of substrates withinthe chamber.

[0012] Various aspects of the invention can utilize remote assistedchemical activated methodologies to enhance atomic layer deposition. Forexample, plasma-assist and/or pre-heating of materials can be utilizedin methodology of the present invention.

[0013] In one aspect, the invention encompasses apparatuses which can beutilized for treating a plurality of discrete semiconductor substrates.The apparatuses can be particularly well suited for atomic layerdeposition.

BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Preferred embodiments of the invention are described below withreference to the following accompanying drawings.

[0015]FIG. 1 is a diagrammatic, cross-sectional view of a semiconductorwafer fragment shown at a preliminary processing step of an exemplarymethod of the present invention.

[0016]FIG. 2 is a view of the FIG. 1 wafer fragment shown at aprocessing step subsequent to that of FIG. 1.

[0017]FIG. 3 is a view of the FIG. 1 wafer fragment shown at aprocessing step subsequent to that of FIG. 2.

[0018]FIG. 4 is a diagrammatic, cross-sectional view of a reactionchamber which can be utilized in various methods associated with thepresent invention. The reaction chamber is shown at an exemplaryprocessing step, and accordingly has a plurality of discretesemiconductor substrates shown therein.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] In particular aspects, the present application pertains to atomiclayer deposition (ALD) technology. ALD technology typically involvesformation of successive atomic layers on a substrate. Such layers maycomprise, for example, an epitaxial, polycrystalline, and/or amorphousmaterial. ALD may also be referred to as atomic layer epitaxy, atomiclayer processing, etc.

[0020] The deposition methods herein are described in the context offormation of materials on one or more semiconductor substrates. In thecontext of this document, the term “semiconductor substrate” or“semiconductive substrate” is defined to mean any constructioncomprising semiconductive material, including, but not limited to, bulksemiconductive materials such as a semiconductive wafer (either alone orin assemblies comprising other materials thereon), and semiconductivematerial layers (either alone or in assemblies comprising othermaterials). The term “substrate” refers to any supporting structure,including, but not limited to, the semiconductive substrates describedabove. Also in the context of the present document, “metal” or “metalelement” refers to the elements of Groups IA, IIA, and IB to VIIIB ofthe periodic table of the elements along with the portions of GroupsIIIA to VIA designated as metals in the periodic table, namely, Al, Ga,In, Tl, Ge, Sn, Pb, Sb, Bi, and Po. The Lanthanides and Actinides areincluded as part of Group IIIB. “Non-metals” refers to the remainingelements of the periodic table.

[0021] Described in summary, ALD includes exposing an initial substrateto a first chemical species to accomplish chemisorption of the speciesonto the substrate. Theoretically, the chemisorption forms a monolayerthat is uniformly one atom or molecule thick on the entire exposedinitial substrate. In other words, a saturated monolayer. Practically,as further described below, chemisorption might not occur on allportions of the substrate. Nevertheless, such an imperfect monolayer isstill a monolayer in the context of this document. In many applications,merely a substantially saturated monolayer may be suitable. Asubstantially saturated monolayer is one that will still yield adeposited layer exhibiting the quality and/or properties desired forsuch layer.

[0022] The first species is purged from over the substrate and a secondchemical species is provided to chemisorb onto the first monolayer ofthe first species. The second species is then purged and the steps arerepeated with exposure of the second species monolayer to the firstspecies. In some cases, the two monolayers may be of the same species.Also, a third species or more may be successively chemisorbed and purgedjust as described for the first and second species. It is noted that oneor more of the first, second and third species can be mixed with inertgas to speed up pressure saturation within a reaction chamber.

[0023] Purging may involve a variety of techniques including, but notlimited to, contacting the substrate and/or monolayer with a carrier gasand/or lowering pressure to below the deposition pressure to reduce theconcentration of a species contacting the substrate and/or chemisorbedspecies. Examples of carrier gases include N₂, Ar, He, Ne, Kr, Xe, etc.Purging may instead include contacting the substrate and/or monolayerwith any substance that allows chemisorption byproducts to desorb andreduces the concentration of a species preparatory to introducinganother species. A suitable amount of purging can be determinedexperimentally as known to those skilled in the art. Purging time may besuccessively reduced to a purge time that yields an increase in filmgrowth rate. The increase in film growth rate might be an indication ofa change to a non-ALD process regime and may be used to establish apurge time limit.

[0024] ALD is often described as a self-limiting process, in that afinite number of sites exist on a substrate to which the first speciesmay form chemical bonds. The second species might only bond to the firstspecies and thus may also be self-limiting. Once all of the finitenumber of sites on a substrate are bonded with a first species, thefirst species will often not bond to other of the first species alreadybonded with the substrate. However, process conditions can be varied inALD to promote such bonding and render ALD not self-limiting.Accordingly, ALD may also encompass a species forming other than onemonolayer at a time by stacking of a species, forming a layer more thanone atom or molecule thick. The various aspects of the present inventiondescribed herein are applicable to any circumstance where ALD may bedesired. It is further noted that local chemical reactions can occurduring ALD (for instance, an incoming reactant molecule can displace amolecule from an existing surface rather than forming a monolayer overthe surface). To the extent that such chemical reactions occur, they aregenerally confined within the uppermost monolayer of a surface.

[0025] Traditional ALD can occur within an frequently-used ranges oftemperature and pressure and according to established purging criteriato achieve the desired formation of an overall ALD layer one monolayerat a time. Even so, ALD conditions can vary greatly depending on theparticular precursors, layer composition, deposition equipment, andother factors according to criteria known by those skilled in the art.Maintaining the traditional conditions of temperature, pressure, andpurging minimizes unwanted reactions that may impact monolayer formationand quality of the resulting overall ALD layer. Accordingly, operatingoutside the traditional temperature and pressure ranges may riskformation of defective monolayers.

[0026] The general technology of chemical vapor deposition (CVD)includes a variety of more specific processes, including, but notlimited to, plasma enhanced CVD and others. CVD is commonly used to formnon-selectively a complete, deposited material on a substrate. Onecharacteristic of CVD is the simultaneous presence of multiple speciesin the deposition chamber that react to form the deposited material.Such condition is contrasted with the purging criteria for traditionalALD wherein a substrate is contacted with a single deposition speciesthat chemisorbs to a substrate or previously deposited species. An ALDprocess regime may provide a simultaneously contacted plurality ofspecies of a type or under conditions such that ALD chemisorption,rather than CVD reaction occurs. Instead of reacting together, thespecies may chemisorb to a substrate or previously deposited species,providing a surface onto which subsequent species may next chemisorb toform a complete layer of desired material.

[0027] Under most CVD conditions, deposition occurs largely independentof the composition or surface properties of an underlying substrate. Bycontrast, chemisorption rate in ALD might be influenced by thecomposition, crystalline structure, and other properties of a substrateor chemisorbed species. Other process conditions, for example, pressureand temperature, may also influence chemisorption rate. Accordingly,observation indicates that chemisorption might not occur appreciably onportions of a substrate though it occurs at a suitable rate on otherportions of the same substrate. Such a condition may introduceintolerable defects into a deposited material.

[0028] An exemplary ALD process is described with reference to FIGS.1-3. Referring initially to FIG. 1, a semiconductor construction 10 isillustrated. Construction 10 comprises a semiconductor substrate 12.Substrate 12 can comprise, for example, a monocrystalline silicon havingone or more materials (not shown) supported thereby. In particularapplications, substrate 12 can comprise a monocrystalline silicon waferthat is ultimately to have various integrated circuit devices formedthereover. The devices can be at various stages of completion in theprocessing of FIG. 1. The various devices which can be associated withsubstrate 12 will be recognized by persons of ordinary skill in the art,and are not shown in the diagrammatic illustration of FIG. 1.

[0029] Referring to FIG. 2, construction 10 is shown at a processingstep subsequent to that of FIG. 1. Specifically, the construction isillustrated after a monolayer 14 has been formed across substrate 12.Monolayer 14 can be formed by placing construction 10 within a reactionchamber, and exposing the construction to a suitable ALD reactant togenerate the monolayer 14. After monolayer 14 is formed, the reactionchamber can be purged of the reactant utilized to generate themonolayer. Subsequently, a second reactant can be introduced to convertmonolayer 14 into a desired mass 16, which is illustrated in FIG. 3. Insubsequent cycles, the combined mass 16 and substrate 12 can beconsidered a new substrate for ALD deposition, and subjected to theprocessing described with reference to FIGS. 2 and 3 to increase athickness of mass 16. Alternatively, or additionally, mass 16 can besubjected to a third reactant to convert the mass to yet another desiredmaterial.

[0030] In exemplary processing, mass 16 can comprise one or more of TaO,TiN, TiSiN, TaSiN, TaSi, TaN, WN, W, Ti, Al, O, HfO, ZrO, SiO, SiN,TiSi, and WSi; with the listed compositions being shown in terms of theelements contained therein rather than in terms of a stoichiometricrelationship of the elements. Accordingly, the indicated SiO can be inthe form of silicon dioxide (SiO₂), and the indicated SiN can be in theform of silicon nitride (Si₃N₄). In further particular embodiments, themass 16 can consist of, or consist essentially of, TaO, TiN, TiSiN,TaSiN, TaSi, TaN, WN, W, Ti, AlO, HfO, ZrO, SiO, SiN, TiSi, WSi, andSiON; with the list of compositions being shown in terms of the elementscontained therein, rather than in terms of a stoichiometric relationshipwith the elements.

[0031] Mass 16 can be exposed to post-formation processing to convertthe mass to another material. For instance, if mass 16 comprises SiN,the mass can be exposed to oxygen to form SiON from the SiN (with thecomposition SiON being shown in terms of the elements contained therein,rather than in terms of a stoichiometric relationship with theelements). The exposure to oxygen can comprise exposure to one or moreof O₂, O₃, and H₂O₂.

[0032] Numerous methods can be utilized for forming various of theabove-described materials of mass 16. In an exemplary method, mass 16comprises Ta₂O₅. Such mass can be formed utilizing a first reactivematerial comprising, consisting essentially of, or consisting oftantalum pentaethoxide to generate the first mass 14 (FIG. 2), and thenutilizing a second reactive material comprising, consisting essentiallyof, or consisting of ozone to convert the first mass 14 to the secondmass 16 (FIG. 3) of Ta₂O₅.

[0033] In another exemplary embodiment, a first reactive materialcomprising, consisting essentially of, or consisting of TiCl₄ isutilized to generate first mass 14, and a second reactive materialcomprising, consisting essentially of, or consisting of NH₃ is utilizedto convert first mass 14 into a second mass 16 comprising TiN.

[0034] In another exemplary embodiment, the first reactive material cancomprise, consist essentially of, or consist of TiCl₄ and be utilized togenerate the first mass 14, and such can subsequently be exposed to asecond reactive material which contains silicon to generate second mass16 comprising, consisting essentially of, or consisting of Ti and Si.Such mass 16 can be referred to as comprising Ti_(t)Si_(x), with t and xbeing greater then 0. The silicon-containing reactive material cancomprise, consist essentially of, or consist of, for example, silane. Infurther processing, the mass 16 can be exposed to a third reactivematerial comprising NH₃ to convert the mass to Ti_(t)Si_(x)N_(y), witht, x and y being greater than 0. Alternatively, the second reactivematerial can comprise H₂O, and mass 16 can comprise TiO₂.

[0035] In further exemplary processing, a first reactive materialcomprising, consisting essentially of, or consisting of TaCl₅ can beutilized to generate first mass 14, and such can subsequently be exposedto a second reactive material comprising silicon to form the second mass16 comprising, consisting essentially of, or consisting of Ta and Si.The silicon-containing material can comprise, consist essentially of, orconsist of, for example, silane. The mass comprising Ta and Si can be,for example, Ta_(t)Si_(x), where t and x are greater than 0. In furtherprocessing, the mass comprising Ta and Si can be exposed to a reactivematerial comprising, consisting essentially of, or consisting of NH₃ toconvert the mass to Ta_(t)Si_(x)N_(y), with t, x and y being greaterthan 0.

[0036] In yet other exemplary processing, the first reactive materialcan comprise, consist essentially of, or consist of WF₆ to form thefirst mass 14, and such mass can then be exposed to a second reactivematerial comprising silicon to generate the second mass 16 comprising,consisting essentially of, or consisting of W_(t)Si_(x), with t and xbeing greater than 0. The silicon-containing reactive material cancomprise, consist essentially of, or consist of, for example, silane.

[0037] In yet other exemplary processing, the first reactive materialcan comprise, consist essentially of, or consist of TaF₅ and be utilizedto generate first mass 14. The first mass can then be exposed to asecond reactive material comprising, consisting essentially of, orconsisting of NH₃, to form the second mass 16 comprising, consistingessentially of, or consisting of Ta_(t)N_(x), with t and x being greaterthan 0.

[0038] In yet other exemplary processing, the first reactive materialcan comprise WF₆ to generate the first mass 14. The first mass 14 canthen be exposed to a second reactive material comprising, consistingessentially of, or consisting of NH₃ to generate the second mass 16comprising W_(t)N_(x), with t and x being greater than 0. Alternatively,the second reactive material can comprise, consist essentially of, orconsist of H₂, to generate the second mass 16 comprising, consistingessentially of, or consisting of W.

[0039] In yet other exemplary processing, the mass 16 can comprise,consist essentially of, or consist of Ti; and can be formed from a firstreactive material comprising, consisting essentially of, or consistingof TiCl₄, and a second reactive material comprising, consistingessentially of, or consisting of H₂.

[0040] In yet other exemplary processing, the mass 16 can comprise,consist essentially of, or consist of SiO₂; and can be formed from afirst silicon-containing reactive material and a second reactivematerial comprising oxygen. The first silicon-containing material cancomprise, consist essentially of, or consist of, for example, silane ortrichlorosilane. The oxygen-containing reactive material can comprise,consist essentially of, or consist of one or more of O₂, O₃, and H₂O₂.

[0041] In yet another embodiment, mass 16 can comprise Al₂O₃, and can beformed from a first reactive material comprising, consisting essentiallyof, or consisting of Al(CH₃)₃, and a second reactive materialcomprising, consisting essentially of, or consisting of H₂O.

[0042] In another exemplary embodiment, mass 16 can comprise, consistessentially of, or consist of ZrO, with the composition being shown interms of the elements contained therein rather than in terms of astoichiometric relationship of the elements (typically the compositionwould be ZrO₂). In such embodiment, the first reactive material cancomprise, consist essentially of, or consist of ZrCl₄, and the secondreactive material can comprise, consist essentially of, or consist ofH₂O.

[0043] In another exemplary embodiment, the mass 16 can comprise,consist essentially of, or consist of HfO, with the listed compositionbeing shown in terms of the elements contained therein rather than interms of a stoichiometric relationship of the elements (typically thecomposition would be HfO₂). The first reactive material can comprise,consist essentially of, or consist of HfCl₄, and the second reactivematerial can comprise, consist essentially of, or consist of H₂O.

[0044] In yet other exemplary embodiments, various cycles of ALD can beutilized to incorporate mass 16 into a laminate comprising Al₂O₃ andtantalum, or a laminate comprising Al₂O₃ and one or more of Ta₂O₅, HfO₂,ZrO₂ and SiO₂. Alternatively, mass 16 can be incorporated into alaminate consisting essentially of Al₂O₃ and SiO₂.

[0045] In particular aspects, the invention pertains to methods in whicha plurality of discrete semiconductor substrates are simultaneouslysubjected to ALD within a common reaction chamber. Such aspects aredescribed with reference to an exemplary apparatus 50 in FIG. 4.Apparatus 50 comprises a reaction chamber 52. Chamber 52 has a top 54, abottom 56, a first vertical segment 58, and a second vertical segment60. First vertical segment 58 is in opposing relation relative to secondvertical segment 60, and top 54 is in opposing relation relative tobottom 56. Chamber 52 can comprise a cylindrical shape such that sides58 and 60 are part of a common curved lateral periphery of the chamber.Alternatively, chamber 52 can comprise a rectangular or square shape.

[0046] Chamber 52 comprises a wall 61 which defines a periphery of thechamber. An inlet port 62 extends through wall 61 at bottom 56 of thechamber, and an outlet port 64 extends through wall 61 at top 54 of thechamber. Top 54 and bottom 56 can be considered to be sides of chamber52 (i.e, a top side and a bottom side) which are opposed relative to oneanother, and can be referred to as a first sidewall and second sidewall,respectively.

[0047] Inlet 62 is in fluid communication with a source 66 of firstreactive material, and a source 68 of second reactive material.Materials from sources 66 and 68 flow through a valve 70 and intochamber 52 along the direction designated by arrow 72. Valve 70 ispreferably configured to allow only one of the reactive materials toflow into chamber 52 at any given time. Accordingly, apparatus 50 isconfigured for utilization in an ALD process, rather than a CVD process.The shown configuration of having two reaction components configured toflow through a single valve 70 into chamber 52 is an exemplaryembodiment, and an apparatus of the present invention can have otherconfigurations. For instance, more than two sources of reactive gasescan be in fluid communication with inlet port 62 through a valve.Further, multiple valves can be utilized so that each reactive componentflows through a separate valve relative to the other reactivecomponents. Additionally, a source of purge gas can be provided in fluidcommunication with inlet 62 to simplify purging of a first reactivematerial from within chamber 52 prior to introduction of a secondreactive material into the chamber.

[0048] Outlet port 64 is in fluid communication through a valve 72 witha pump 74. Pump 74 can be utilized to evacuate chamber 52 prior tointroduction of a reactive material into the chamber, as well as torapidly pull reactive materials through the chamber.

[0049] A plurality of heating coils 76 are shown extending aroundchamber 52. Coils 76 can be utilized to heat chamber wall 61 during anALD operation. Such can reduce or eliminate side reactions fromoccurring relative to wall 61. The side reactions can be problematic ifwall 61 is cold relative to semiconductor substrate surfaces which arebeing treated within chamber 52, as many of the reactive componentsutilized in ALD can react at or near cold chamber walls. Construction 50can be considered a furnace due to the inclusion of heating elements 76within the construction.

[0050] A holder 80 is provided within chamber 52, and such retains aplurality of semiconductor substrates 82. The substrates 82 are shownwith cross-hatching to assist the reader in visualizing the structures,and not to indicate any conductivity or material compositions of thestructures. Each of the substrates 82 can be considered as beingdiscrete relative to the other substrates 82 retained within thechamber.

[0051] Holder 80 comprises legs 84 which elevate a base of holder 80above an internal bottom surface of wall 61. Various additional heatingelements (not shown) can be included within construction 50 to heat theindividual semiconductor substrates 82 retained within the chamber.

[0052] In operation, a plurality of discrete semiconductor substratesare provided within chamber 52, and subsequently a first reactivematerial is flowed into the chamber. At least some of the exposedsurfaces of the discrete semiconductor substrates react with the firstreactive material so that a layer (typically a monolayer) is formed overat least some of the exposed surfaces. In particular embodiments, all ofthe exposed surfaces of the semiconductor substrates have a monolayerformed thereover. In such embodiments, back surfaces of thesemiconductor substrates can be retained Within a protective structureso that the monolayer is not formed on such back surfaces. The monolayercan be considered as a first mass formed across the exposed surfaces ofthe plurality of discrete semiconductor substrates. The substrates arepreferably held at a first temperature during the exposure to the firstreactive material. An exemplary temperature can be from about 300° C. toabout 700° C. Such temperature can be particularly useful inapplications in which the first reactive material is asilicon-containing precursor, such as, for example, trichlorosilane.

[0053] Substrates 82 can be exposed to the reactive material for asufficient time to saturate exposed surfaces of the substrates with adesired mass. For instance, if the substrates are exposed to asilicon-containing reactive precursor to form a silicon-containing mass,the substrates will preferably be exposed for a sufficient time tosaturate exposed surfaces of the substrates with the silicon-containingmass. If the silicon-containing precursor comprises trichlorosilane, andthe exposed surfaces comprised silicon, a suitable exposure time can beat least about 5 minutes.

[0054] After the exposure of substrates 82 to the first reactivematerial, pump 74 can be utilized to evacuate the-first reactivematerial from within chamber 52. A purge gas can be flushed through thechamber during such evacuation.

[0055] After the first reactive material is purged from within chamber52, a second reactive material is introduced into the chamber. Thesecond reactive material converts the first mass into a second mass. Inan exemplary embodiment in which the first mass is formed fromtrichlorosilane, the second reactive material can comprise anitrogen-containing precursor, such as, for example, ammonium, toconvert the first mass into silicon nitride.

[0056] It can be preferred that the discrete semiconductor substratesare held at a temperature during exposure to the second reactivematerial which is comparable to the temperature utilized during exposureto the first reactive material. In particular embodiments, thesemiconductor substrates can be held at a temperature during exposure tothe second reactive material which is within about 100° C. of thetemperature utilized during exposure to the first reactive material,within about 50° C. of the temperature utilized during exposure to thefirst reactive material, within about 25° C. of the temperature utilizedduring the first reactive material, within about 10° C. of thetemperature utilized during exposure to the first reactive material,within about 5° C. of the temperature utilized during exposure to thefirst reactive material, or even within about 1° C. of the temperatureutilized during exposure to the first reactive material.

[0057] An advantage of utilizing about the same temperature duringexposure of substrates 82 to the second reactive material as is utilizedduring exposure to the first reactive material is that such can simplifya thermal cycle utilized during an ALD process. An additional advantageis that substrates 82 will not be exposed to substantially differentthermal temperatures during the ALD process, which can alleviateformation of thermally-induced defects within substrates 82.

[0058] Heating elements 76 can be utilized to ensure that reactionchamber 52 has hot internal walls during exposure of the discretesemiconductor substrates to the first and second reactive materials, andspecifically to ensure that the internal wall temperature is about thesame as the temperature of the semiconductor substrates during exposureto the first and second reactive materials. If the internal walltemperature is about the same as the temperature of the substratesduring exposure to the first and second reactive materials, such canalleviate or eliminate generation of contaminates within chamber 52.Further, to the extent that side reactions occur at the walls of chamber52, such reactions will be occurring at the same temperature assubstrates 82 are exposed to, and accordingly the side reactions cangenerate the same materials as are being deposited on substrates 82.Thus, if the materials from the side reactions inadvertently fall fromwalls of chamber 52 onto the substrates, they may simply be additionaldesired material on the substrates rather than contaminating material.

[0059] The exemplary pressure within chamber 52 during exposure ofsubstrates 82 to the first and second reactive materials is typically atleast about 1 Torr, and can be equal to or greater than atmosphericpressure.

[0060] An advantage of utilizing the chamber construction 52 of FIG. 4is that such can enable rapid flushing of a chamber between ALD cycles,as well as rapid ramping of a pressure within the chamber to a desiredlevel when filling the chamber with reactive material. Chamber 52 can beconsidered to comprise an upper sidewall 54 having a first internalsurface area. Outlet port 64 extends through upper sidewall 54, and thusreduces the internal surface area of the sidewall. In other words, thereis less of sidewall 54 present due to the opening of outlet 64 thanthere would be if there was no opening of outlet 64. The size of outlet64 is preferably large enough relative to sidewall 54 to enable rapidflushing of materials from within chamber 52. Accordingly, outlet port64 preferably reduces an internal surface area of sidewall 54 by atleast about 30 percent, more preferably by at least about 50 percent,yet more preferably by at least about 70 percent, and even morepreferably by at least 90 percent.

[0061] Similarly, inlet port 62 reduces an internal surface area ofsidewall 56, and preferably inlet port 62 is large enough relative tosidewall 56 to enable rapid transfer of reactive materials into chamber52. Accordingly, inlet port 62 preferably reduces an internal surfacearea of sidewall 56 by at least about 30 percent, more preferably by atleast about 50 percent, yet more preferably by at least about 70percent, and even more preferably by at least about 90 percent.

[0062] In a particular aspect of the invention, the relative size ofinlet port 62 and/or outlet port 64 to chamber 52 can be adjustable.

[0063] In exemplary embodiments, methodology of the present inventioncan include various pretreatments of semiconductor substrates within areaction chamber prior to an ALD process occurring in the same reactionchamber. For instance, semiconductor substrates containing silicon willfrequently have native oxide (SiO₂) formed thereover. Such native oxidecan be problematic in various semiconductor constructions, andaccordingly it can be desired to remove the native oxide prior to an ALDprocess. In particular methodology of the present invention, a pluralityof substrates 82 are provided within a reaction chamber 52, and thesubstrates are exposed to one or more of H, F, and Cl to remove nativeoxide from the semiconductor substrates. After the native oxide isremoved, the substrates are exposed to an ALD process within thechamber, which comprises of the substrates to a first reactive material,purging of the first reactive material from within the chamber, andsubsequent exposing of the substrates to a second reactive material.

[0064] The removal of the native oxide can comprise, for example,exposing the semiconductor substrates to H₂ at a temperature of at leastabout 750° C. Alternatively, the native oxide removal can compriseexposing the semiconductor substrates to at least one plasma-activatedspecies of hydrogen. Such plasma-activated species of hydrogen can beintroduced into chamber 52 through a separate port (not shown). Theseparate port can be in fluid communication with a reaction chamber (notshown) in which one or more hydrogen-containing precursors are exposedto plasma to generate plasma-activated species of hydrogen. Theplasma-activated hydrogen-containing species are the fed through theseparate port into reaction chamber 52.

[0065] Alternatively, the removal of native oxide can comprise exposingthe semiconductor substrates to gaseous HCl and/or HF within chamber 52.

[0066] In another exemplary pretreatment of semiconductor substrates,the substrates can be exposed to oxygen within chamber 52 to form auniform layer of oxide across exposed oxidizable surfaces ofsilicon-containing semiconductor substrates prior to an ALD process.Such can be accomplished by, for example, placing a plurality ofsemiconductor substrates 82 within chamber 52, and subsequently exposingthe substrates to a source of oxygen comprising, consisting of, orconsisting essentially of one or more of O₂, O₃, and H₂O₂. Afterexposure to the oxygen, the reaction chamber 52 can be flushed andsubsequently substrates 82 are subjected to an ALD process.

[0067] The formation of a uniform layer of oxide over exposed oxidizablesurfaces of the substrates can provide a homogeneous base for subsequentformation of materials by ALD.

[0068] In compliance with the statute, the invention has been describedin language more or less specific as to structural and methodicalfeatures. It is to be understood, however, that the invention is notlimited to the specific features shown and described, since the meansherein disclosed comprise preferred forms of putting the invention intoeffect. The invention is, therefore, claimed in any of its forms ormodifications within the proper scope of the appended claimsappropriately interpreted in accordance with the doctrine ofequivalents.

1. An atomic layer deposition method for treating a plurality ofdiscrete semiconductor substrates, comprising: placing the plurality ofdiscrete semiconductor substrates in a reaction chamber; simultaneouslyexposing the plurality of discrete semiconductor substrates to one ormore of H, F and Cl within the chamber to remove exposed native oxidefrom the semiconductor substrates; after removing the native oxide,simultaneously exposing the plurality of discrete semiconductorsubstrates to a first reactive material within the chamber to form afirst mass across at least some exposed surfaces of the plurality ofdiscrete semiconductor substrates; removing the first reactive materialfrom within the reaction chamber; and after removing the first reactivematerial, simultaneously exposing the plurality of discretesemiconductor substrates within the chamber to a second reactivematerial to convert the first mass to a second mass.
 2. The method ofclaim 1 wherein the simultaneously exposing the plurality of discretesemiconductor substrates to one or more of H, F and Cl comprisesexposing the semiconductor substrates to H₂ at a temperature of at leastabout 750° C.
 3. The method of claim 1 wherein the simultaneouslyexposing the plurality of discrete semiconductor substrates to one ormore of H, F and Cl comprises exposing the semiconductor substrates toat least one plasma-activated species of hydrogen.
 4. The method ofclaim 1 wherein the simultaneously exposing the plurality of discretesemiconductor substrates to one or more of H, F and Cl comprisesexposing the semiconductor substrates to gaseous HCl.
 5. The method ofclaim 1 wherein the reaction chamber has hot internal walls during theexposing of the plurality of discrete semiconductor substrates to thefirst,and:second reactive materials.
 6. The method of claim 1 whereinthe second mass is selected from the group consisting of TaO, TiN,TiSiN, TaSiN, TaSi, TaN, WN, W, Ti, AlO, HfO, ZrO, SiO, SiN, TiSi andWSi; with the listed compositions being shown in terms of the elementscontained therein rather than in terms of a stoichiometric relationshipof the elements.
 7. The method of claim 1 wherein the second masscomprises Ta.
 8. The method of claim 1 wherein the second mass comprisesTi.
 9. The method of claim 1 wherein the second mass comprises W. 10.The method of claim 1 wherein the second mass comprises Al.
 11. Themethod of claim 1 wherein the second mass comprises Hf.
 12. The methodof claim 1 wherein the second mass comprises Zr.
 13. The method of claim1 wherein the second mass comprises SiO, with the composition beingshown in terms of the elements contained therein rather than in terms ofa stoichiometric relationship of the elements.
 14. The method of claim 1wherein the second mass comprises SiN, with the composition being shownin terms of the elements contained therein rather than in terms of astoichiometric relationship of the elements.
 15. The method of claim 1wherein: the second mass comprises SiN, with the composition being shownin terms of the elements contained therein rather than in terms of astoichiometric relationship of the elements; and the second mass isexposed to oxygen to form SiON from the SiN, with the composition SiONbeing shown in terms of the elements contained therein rather than interms of a stoichiometric relationship of the elements.
 16. The methodof claim 15 wherein the exposure to oxygen comprises exposure to one ormore of O₂, O₃ and H₂O₂.
 17. A method for treating a plurality ofdiscrete semiconductor substrates, comprising: placing the plurality ofdiscrete semiconductor substrates in a reaction chamber; simultaneouslyexposing the plurality of discrete semiconductor substrates to oxygenwithin the chamber to form a uniform layer of oxide across exposedoxidizable surfaces of the semiconductor substrates; after forming theoxide, simultaneously exposing the plurality of discrete semiconductorsubstrates to a first reactive material within the chamber to form afirst mass across at least some portions of the plurality of discretesemiconductor substrates; removing the first reactive material fromwithin the reaction chamber; and after removing the first reactivematerial, simultaneously exposing the plurality of discretesemiconductor substrates within the chamber to a second reactivematerial to convert the first mass to a second mass.
 18. The method ofclaim 17 wherein the exposure to oxygen comprises exposure to one ormore of O₂, O₃ and H₂O₂.
 19. The method of claim 17 wherein the reactionchamber has hot internal walls during the exposing of the plurality ofdiscrete semiconductor substrates to the first and second reactivematerials.
 20. The method of claim 17 wherein the second mass isselected from the group consisting of TaO, TiN, TiSiN, TaSiN, TaSi, TaN,WN, W, Ti, AlO, HfO, ZrO, SiO, SiN, TiSi and WSi; with the listedcompositions being shown in terms of the elements contained thereinrather than in terms of a stoichiometric relationship of the elements.21. The method of claim 17 wherein the second mass comprises SiO, withthe composition being shown in terms of the elements contained thereinrather than in terms of a stoichiometric relationship of the elements.22. The method of claim 17 wherein the second mass comprises SiN, withthe composition being shown in terms of the elements contained thereinrather than in terms of a stoichiometric relationship of the elements.23. The method of claim 17 wherein: the second mass comprises SiN, withthe composition being shown in terms of the elements contained thereinrather than in terms of a stoichiometric relationship of the elements;and the second mass is exposed to a second oxygen-containing material toform SiON from the SiN, with the composition SiON being shown in termsof the elements contained therein rather than in terms of astoichiometric relationship of the elements.
 24. The method of claim 23wherein the exposure to the second oxygen-containing material comprisesexposure to one or more of O₂, O₃ and H₂O₂.
 25. A method for treating aplurality of discrete semiconductor substrates, comprising: placing theplurality of discrete semiconductor substrates in reaction chamber;simultaneously exposing the plurality of discrete semiconductorsubstrates to a first reactive material within the chamber to form afirst mass across at least some exposed surfaces of the plurality ofdiscrete semiconductor substrates; removing the first reactive materialfrom the reaction chamber; and after the removing, simultaneouslyexposing the plurality of discrete semiconductor substrates to a secondreactive material within the chamber to convert the first mass to asecond mass, the second mass comprising one or more of Ta, Ti, W, Al,Hf, SiO and Zr; wherein the listed composition of SiO is shown in termsof the elements contained therein rather than in terms of astoichiometric relationship of the elements.
 26. The method of claim 25wherein the reaction chamber has hot internal walls during the exposingof the plurality of discrete semiconductor substrates to the first andsecond reactive materials.
 27. The method of claim 25 wherein the secondmass is selected from the group consisting of TaO, TiN, TiSiN, TaSiN,TaSi, TaN, WN, W, Ti, AlO, HfO, ZrO, SiO, TiSi and WSi; with the listedcompositions being shown in terms of the elements contained thereinrather than in terms of a stoichiometric relationship of the elements.28. The method of claim 25 wherein the second mass comprises Ta.
 29. Themethod of claim 25 wherein the second mass comprises Ti.
 30. The methodof claim 25 wherein the second mass comprises W.
 31. The method of claim25 wherein the second mass comprises Al.
 32. The method of claim 25wherein the second mass comprises Hf.
 33. The method of claim 25 whereinthe second mass comprises Zr.
 34. The method of claim 25 wherein thesecond mass comprises SiO₂.
 35. An atomic layer deposition method fortreating a plurality of discrete semiconductor substrates, comprising:placing the plurality of discrete semiconductor substrates in reactionchamber; simultaneously exposing the plurality of discrete semiconductorsubstrates to a first reactive material within the chamber to form afirst mass across at least some exposed surfaces of the plurality ofdiscrete semiconductor substrates, the discrete semiconductor substratesbeing at a first temperature during the exposing to the first reactivematerial; removing the first reactive material from the reactionchamber; and after the removing, simultaneously exposing the pluralityof discrete semiconductor substrates to a second reactive materialwithin the chamber to convert the first mass to a second mass, thediscrete semiconductor substrates being within 100° C. of the firsttemperature during the exposing to the second reactive material.
 36. Themethod of claim 35 wherein the second mass is selected from the groupconsisting of TaO, TiN, TiSiN, TaSiN, TaSi, TaN, WN, W, Ti, AlO, HfO,ZrO, SiO, TiSi, SiN, and WSi; with the listed compositions being shownin terms of the elements contained therein rather than in terms of astoichiometric relationship of the elements.
 37. The method of claim 35wherein the second mass comprises one or more of Ta, Ti, W, Al, Hf, andZr.
 38. The method of claim 35 wherein the second mass comprises Si. 39.The method of claim 35 wherein the first reactive material comprisestantalum pentaethoxide, the second reactive material comprises ozone,and the second mass comprises Ta₂O₅.
 40. The method of claim 35 whereinthe first reactive material comprises TiCl₄, the secondreactive-material comprises NH₃, and the second mass comprises TiN. 41.The method of claim 35 wherein the first reactive material comprisesTiCl₄, the second reactive material comprises a silicon-containingmaterial, and the second mass comprises Ti and Si; the method furthercomprising exposing the second mass to a third reactive materialcomprising NH₃ to convert the second mass to Ti_(t)Si_(x)N_(y), where t,x and y are greater than
 0. 42. The method of claim 41 wherein thesilicon-containing material is silane.
 43. The method of claim 35wherein the first reactive material comprises TaCl₅, the second reactivematerial comprises a silicon-containing material, and the second masscomprises Ta and Si; the method further comprising exposing the secondmass to a third reactive material comprising NH₃ to convert the secondmass to Ta_(t)Si_(x)N_(y), where t, x and y are greater than
 0. 44. Themethod of claim 43 wherein the silicon-containing material is silane.45. The method of claim 35.wherein the first reactive material comprisesTaCl₅, the second reactive material comprises a silicon-containingmaterial, and the second mass comprises Ta_(t)Si_(x), where t and x aregreater than
 0. 46. The method of claim 45 wherein thesilicon-containing material is silane.
 47. The method of claim 35wherein the first reactive material comprises TiCl₄, the second reactivematerial comprises a silicon-containing material, and the second masscomprises Ti_(t)Si_(x), where t and x are greater than
 0. 48. The methodof claim 47 wherein the silicon-containing material is silane.
 49. Themethod of claim 35 wherein the first reactive material comprises WF₆,the second reactive material comprises a silicon-containing material,and the second mass comprises W_(t)Si_(x), where t and x are greaterthan
 0. 50. The method of claim 49 wherein the silicon-containingmaterial is silane.
 51. The method of claim 35 wherein the firstreactive material comprises TaF₅, the second reactive material comprisesNH₃, and the second mass comprises Ta_(t)N_(x), where t and x aregreater than
 0. 52. The method of claim 35 wherein the first reactivematerial comprises WF₆, the second reactive material comprises NH₃, andthe second mass comprises W_(t)N_(x), where t and x are greater than 0.53. The method of claim 35 wherein the first reactive material comprisesWF₆, the second reactive material comprises H₂, and the second masscomprises W.
 54. The method of claim 35 wherein the first reactivematerial comprises TiCl₄, the second reactive material comprises H₂, andthe second mass comprises Ti.
 55. The method of claim 35 wherein thefirst reactive material comprises a silicon-containing material, thesecond reactive material comprises oxygen, and the second mass comprisesSiO₂.
 56. The method of claim 55 wherein the silicon-containing materialis silane.
 57. The method of claim 55 wherein the second reactivematerial comprises O₂.
 58. The method of claim 35 wherein the discretesemiconductor substrates are within 50° C. of the first temperatureduring the exposing to the second reactive material.
 59. The method ofclaim 35 wherein the discrete semiconductor substrates are within 25° C.of the first temperature during the exposing to the second reactivematerial.
 60. The method of claim 35 wherein the discrete semiconductorsubstrates are within 10° C. of the first temperature during theexposing to the second reactive material.
 61. The method of claim 35wherein the discrete semiconductor substrates are within 5° C. of thefirst temperature during the exposing to the second reactive material.62. The method of claim 35 wherein the discrete semiconductor substratesare within 1° C. of the first temperature during the exposing to thesecond reactive material.
 63. A method for treating a plurality ofdiscrete semiconductor substrates, comprising: placing the plurality ofdiscrete semiconductor substrates in reaction chamber; simultaneouslyexposing the plurality of discrete semiconductor substrates to asilicon-containing precursor within the chamber to form asilicon-containing mass across at least some exposed surfaces of theplurality of discrete semiconductor substrates, the discretesemiconductor substrates being at a first temperature during theexposing to the silicon-containing precursor, the first temperaturebeing from 300° C. to 700° C.; removing the silicon-containing precursorfrom the reaction chamber; and after the removing, simultaneouslyexposing the plurality of discrete semiconductor substrates to anitrogen-containing precursor within the chamber to convert thesilicon-containing mass to silicon nitride, the discrete semiconductorsubstrates being within 100° C. of the first temperature during theexposing to the nitrogen-containing precursor.
 64. The method of claim63 wherein the discrete semiconductor substrates are within 50° C. ofthe first temperature during the exposing to the nitrogen-containingprecursor.
 65. The method of claim 63 wherein the discrete semiconductorsubstrates are within 25° C. of the first temperature during theexposing to the nitrogen-containing precursor.
 66. The method of claim63 wherein the discrete semiconductor substrates are within 10° C. ofthe first temperature during the exposing to the nitrogen-containingprecursor.
 67. The method of claim 63 wherein the discrete semiconductorsubstrates are within 5° C. of the first temperature during the exposingto the nitrogen-containing precursor.
 68. The method of claim 63 whereinthe discrete semiconductor substrates are within 1° C. of the firsttemperature during the exposing to the nitrogen-containing precursor.69. The method of claim 63 wherein a pressure within the reactor duringthe exposure of the plurality of discrete semiconductor substrates tothe silicon-containing precursor is at least about 1 torr.
 70. Themethod of claim 63 wherein the plurality of discrete semiconductorsubstrates are exposed to the silicon-containing precursor for asufficient time to saturate the at least some of the exposed surfaces ofthe substrates with the silicon-containing mass.
 71. The method of claim70 wherein the time is at least about 5 minutes.
 72. The method of claim63 further comprising exposing the silicon nitride to oxygen to formSiON from the silicon nitride, with the composition SiON being shown interms of the elements contained therein rather than in terms of astoichiometric relationship of the elements.
 73. The method of claim 72wherein the exposure to oxygen comprises exposure to one or more of O₂,O₃ and H₂O₂.
 74. A construction for treating a plurality of discretesemiconductor substrates, comprising: a chamber configured to retain theplurality of discrete semiconductor substrates, the chamber havingsidewalls, two of the sidewalls being on opposing sides of the chamberrelative to one another, the two of sidewalls being a first sidewall anda second sidewall; an inlet port opening into the chamber through thefirst sidewall, the first sidewall having a surface area which isreduced by at least about 30% due to the inlet port; an outlet portopening into the chamber through the second sidewall, the secondsidewall having a surface area which is reduced by at least about 30%due to the outlet port; a gas source in fluid communication with theinlet port; and a valve proximate the outlet port and configured tocontrol gas flow through the outlet port.
 75. The construction of claim74 further comprising heating elements proximate the sidewalls andconfigured to heat the sidewalls.
 76. The construction of claim 74wherein the first sidewall surface area is reduced by at least about 50%due to the inlet port.
 77. The construction of claim 74 wherein thefirst sidewall surface area is reduced by at least about 70% due to theinlet port.
 78. The construction of claim 74 wherein the first sidewallsurface area is reduced by at least about 90% due to the inlet port. 79.The construction of claim 74 wherein the second sidewall surface area isreduced by at least about 50% due to the outlet port.
 80. Theconstruction of claim 74 wherein the second sidewall surface area isreduced by,at least about 70% due to the outlet port.
 81. Theconstruction of claim 74 wherein the second sidewall surface area isreduced by at least about 90% due to the outlet port.